Field of the Invention
The field of this invention relates to a charge pump circuit, an integrated circuit for a charge pump, an electronic device and a method therefor. In particular, the field of the invention may relate to negative voltage generation circuits employing charge pumps to switch off transistor devices.
Background of the Invention
In the field of radio frequency (RF) switches, such as RF silicon-on-insulator (SOI) switches, generally a negative voltage is required in order to disable (turn ‘off’) the SOI switches under a large RF swing. The generation of a negative voltage allows the RF switch designer to avoid the use of DC blocking capacitors. Such a negative voltage is commonly generated by utilising a charge pump circuit, which requires an oscillator to generate the charge pump clock signals. An oscillator that is coupled to a charge pump circuit that generates a negative voltage would typically exhibit low current consumption, and typically needs to be designed with a minimum possible spur current in order to avoid spurious signals for a wireless application.
The generation of a negative voltage requires a mechanism to translate signals from the normal positive voltage domain to a negative voltage domain, whilst satisfying reliability requirements. Hence, a voltage level shift arrangement is typically provided.
Switched capacitor voltage converter circuits are known that accomplish energy transfer and voltage conversion using capacitors. One known form of switched capacitor voltage converter circuit is the voltage inverter. Here, a first charge pump capacitor is charged to the input voltage during a first half of a switching cycle. During the second half of the switching cycle, its voltage is inverted and applied to a second capacitor and the load. The output voltage is the negative of the input voltage, and the average input current is approximately equal to the output current. The switching frequency impacts the size of the external capacitors required, and higher switching frequencies allow the use of smaller capacitors.
Referring to FIG. 1, a circuit for a low noise, inverting, charge pump circuit 100 is illustrated. This charge pump circuit 100 can provide both a pre-set (−4.1V) output voltage 102 and an adjustable (−0.5V to −4.1V) output voltage 104. An external positive control voltage 106 is utilised to set the negative output voltage. The charge pump circuit 100 is designed for biasing GalliumArsenide (GaAs) Field Effect Transistor (FET) devices, such as power amplifier modules in cellular handsets.
An applied input voltage (VIN) is first inverted to a negative voltage at pre-set (−4.1V) negative output voltage 102 by a capacitive charge pump 108. This voltage is then regulated by an internal linear regulator 112, and appears at output voltage 104. The minimum (most negative) output voltage (VOUT) achievable is the inverted positive voltage, plus the dropout voltage of the post-regulator.
However, such known negative voltage generation circuits suffer from one or more of the following problems. Known negative voltage generation circuits are arranged to achieve a fixed negative voltage or an adjustable positive voltage. Some known negative voltage generation circuits are arranged to achieve an adjustable negative voltage but the control is performed in the negative supply domain. This has the disadvantage of increasing the current supplied by the negative supply, reducing overall efficiency and increasing the levels of the spurs associated with the negative voltage generation. Furthermore, it is desirable to reduce or minimize the start-up time of the negative voltage generation circuit.
Therefore, there is a need to find a practical solution for generating a negative voltage, say for use with NMOS switching devices, preferably where the technique is programmable and uses the known technique of charge pumps.